This invention relates to a semiconductor device as typified by a semiconductor memory device, its fabrication method and its design method. More particularly, the present invention relates to a semiconductor device suitable for a high integration density semiconductor device, its fabrication method and its design method.
In the development of a high integration density semiconductor device, efforts at reducing the size of a device isolation region for electrically isolating adjacent device formation regions has been a critical problem.
A thermal oxide film has been generally used for forming this device isolation region. To locally form the thermal oxide film, a silicon nitride film is deposited on the surface of the device formation region and then a thermal oxidation reaction is carried out.
This thermal oxidation reaction proceeds due to diffusion of an oxidation seed, that is, oxygen or steam vapor, and due to a reaction on the interface between an oxide film and a semiconductor substrate.
Because diffusion of the oxidation seed takes place three-dimensionally, such diffusion is extended also to a location below the silicon nitride film at which location the oxide film is not desired to be formed. Because the shape of growth of the oxide film below the silicon nitride film has a shape of the beak of a bird, it is generally referred to as a “bird's beak”. The growth of the bird's beak reduces an area of the device formation region. Therefore, restriction of this growth is important towards accomplishing a high integration density.
To restrict the growth of the bird's beak, a technology which forms grooves on a semiconductor substrate near the end portion of the silicon nitride film and oxidizes the inner wall of the grooves to form the device isolation regions has been developed in the past. A concrete method is described in JP-A-3-96249 and JP-A-4-127433, for example.
The silicon nitride film used as an antioxidation film generally has a great internal stress. Therefore, a high stress occurs in the proximity of the semiconductor substrate surface, too. When a shear stress component (resolved shear stress) in a direction of a slip plane of a crystal exceeds a limit value, dislocation occurs, and electric characteristics of a device are remarkably deteriorated.
The strength of the semiconductor substrate remarkably drops near 1,000° C. at which a thermal oxidation step is carried out in comparison with a temperature near room temperature, and dislocation is extremely likely to occur. Accordingly, stress control is also very important.
In the ordinary thermal oxidation process, a thin thermal oxide film (which will be hereinafter referred to as a “pad oxide film”) is first formed on the semiconductor substrate surface so as to protect the semiconductor substrate from the internal stress of the silicon nitride film, and the silicon nitride film is then deposited. The value of the resolved shear stress occurring in the semiconductor substrate below the end portion of the silicon nitride film can be limited to be below the dislocation occurrence limit by controlling the film thickness of this pad oxide film, and the occurrence of dislocation can be thus prevented.
When the grooves are formed on the substrate surface to restrict the growth of the bird's beak, however, the stress field occurring near the substrate surface is likely to change, and the value of the resolved shear stress increases in accordance with the depth of the grooves formed.
FIGS. 2A and 2B of the accompanying drawings illustrate an example of analysis of the relationship between the depth of the groove formed on the substrate surface and the resulting stress. The abscissa in FIG. 2B represents the groove depth (that is, an over-etch quantity D of the substrate) and the ordinate represents the maximum stress (that is, a maximum stress at the mask end).
Incidentally, the ordinate is normalized by a stress value before the formation of the groove. It can be understood that the resulting stress increases due to the formation of the groove. A stress concentration field has existed at only the end portion of the silicon nitride film before the formation of the groove, but when the groove is formed, it also takes place at the lower end portion of the groove formed, too. These two stress concentration fields interfere with each other and eventually increase the resolved shear stress component in the direction of the slip plane on the sidewalls of the groove.
In this instance, there is the case where the resulting stress exceeds the dislocation occurrence limit value with the formation of the groove even when the stress value before the formation of the groove is below the dislocation occurrence limit value. As will be later described, this stress increase has dependence on the pattern dimension. Accordingly, when the grooves are formed on the semiconductor substrate surface, an appropriate counter-measure must be taken lest the increased stress exceeds the dislocation occurrence limit value.